Thursday, August 12, 2004

Physical Design Engineer Position in Austin

A recruiter I know well has an opening with a very successful Semiconductor company in Austin Texas. Here is the description:

Perform chip level synthesis, place and route, and timing closure. Not looking for a layout designer. Need someone familiar with transistor level design using Hspice. The ideal candidate will have about 6 years of experience and be able to look at the transistors and run spice. CMOS processes.

If you would like more detail, please contact me.

Here are a number of positions that a recruiter I do lots of work with is looking for:

These positions are with a Silicon Valley startup that was founded in March 2004 by principals from a former highly successful startup. The Company is well-funded through a corporate investment and has in place a strategic alliance with a multi-billion dollar global leader in semiconductor technology and manufacturing.

High Speed Custom Digital Circuit Engineer
looking for a senior IC designer with experiences in all aspects of custom/RTL design flow from specification/architecture definition to design and verification.

Senior ASIC Design Engineer (Timing/Physical)
experienced in all aspects of RTL design flow with the emphasis on timing and physical experience on the timing/physical aspect of multi-million gate ASICs using deep-submicron (0.13um/90nm) process and have handled a few successful tapeouts with first-time success

Senior ASIC Design Engineer (HDC)
responsible for all aspects of the design activities, including architecture definition, design specification, design flow development, logic design and verification, DFT, synthesis and timing closure, and test vector generation

Please contact me at if you are interested

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