Monday, September 01, 2008

Sr. SERDES Design Engineer

Post To
Job Title
Sr. SERDES Design Engineer
Santa Clara, CA
Public Company
Job Description

Position Summary:
Our Serdes design team is seeking an outstanding team member to help us bring new products from design to market and provide fast, reliable solutions to our customers. In this exciting role you will be designing sophisticated high-performance Serdes with our Serdes team to advance the technology solutions in the ASIC market.

-Design and verify sophisticated mixed-signal analog blocks for high-speed SerDes such as PLL, CDR, Serializer, Deserializer, etc.
-Participate and be a key contributor in chip and block level architectures.
-Develop circuit schematics and perform all necessary verification/simulations.
-Assist in architecture, layout, integration, bring-up, post silicon debugging, and characterization.
-Generate design review documentation.
-Interface with other design team members and provide directions to layout and other design engineers, ensuring that elec trical performance meets specifications and requirements.
-Exchange information with, and provide guidance to, other team members in their daily activities.
-Resolve a wide range of issues; fully proficient in understanding of industry communication standards and test equipment tools.
-Self motivated team player.

-BS/MS/PhD Electrical Engineering, and Good communication skills.
-5+ years of analog circuit design experience, mostly in high-speed and low-jitter SERDES.
-Familiar with analog/mixed signal circuit design flow, hands-on experience in designing high speed (> 6.5GHz) analog circuits such as PLL, VCO, CDR, SERDES, equalizer.
-Familiar with design techniques and trade-offs on reducing jitter and increasing operating frequency.
-Knowledge of physical layer.


Key Words
Serdes, PLL, CDR
Recruiting Firm or Company Name
Name Jack Chang
Your Email Address *
27 Aug 2008
10:17:21 PM public
IP Address

No comments: