Role Summary:
We are part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.
MME's Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards.
Job Responsibility:
Responsible for the pre-silicon verification of IP modules or, IP subsystems
Responsible for defining and writing IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications)
Responsible for verification test bench components such as drivers, monitors, and response checkers as well as use of most advanced UVM VIPs
Implement formal verification methods
Define and develop test cases in an appropriate verification framework. Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage.
Work with cross functional teams to developers to drive best practices with a target of ongoing improvement in efficiencies.
Mentor a small team of engineers
Job Qualification:
Degree in Electrical Engineering or Computer Science, with 4-7 years of experience on IP/Sub-System Verification
Proficient in testbench design and development using UVM methodology for IP/Subsystem and SOC.
Experience in AHB/AXI/CHI bus protocols, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers.
Good knowledge of Verilog, System Verilog, C/C++, Shell.
Good knowledge in scripting like Perl, TCL or Python is a plus
Proficient in Metric Driven Verification concepts, functional and code coverage.
Good knowledge in directed and constrained random methodologies
Knowledge of formal verification methodologies and assertions desirable
Experience with debugging of designs pre- and post-silicon, in simulation and on the bench.
Excellent written and verbal communication skill.
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.