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Analog Product Development Engineer - Testchip Post-Si execution

San José, Provincia de San José, Costa Rica Job ID JR0260198 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced Full/Part Time Full Time
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Job Description


Drives and develops testability and manufacturability of analog integrated circuits from the component feasibility stage through the production ramp. Contributes to the design, development, and validation of testability circuits through evaluation, development, and debugging of complex test methods. Develops and debugs complex software programs to convert design validation flows and drive complex test equipment, including the development of digital signal processing, BERTS/Scopes, and automatic test equipment (ATE) for testing analog performance. Collaborates with designers to drive design for test (DFT) features enabling efficient production testing of new products and requirements for design validation (DV) to ensure performance to internal and industry specifications. Works with the design and/or product development team to perform ATEtoDV correlation, debug functionality and performance issues, perform circuit characterization, and design spec validation. Evaluate new analog IP designs on ATE and work with the design, DFx, and product development teams to debug functionality and performance issues to root cause. Performs ATE and bench device characterization, utilizes that data to define datasheet specifications, and performs margin2spec analysis to project yield and PHI concerns. Releases efficient production test solutions that ensure product quality and performance. Engages with manufacturing to monitor and optimize production yield and resolves any postrelease concerns. Tests and characterizes for power and thermals, including thermal profiling and recipe tuning for production thermal control. Provides tailored trimming and calibration for power delivery and/or thermal sensing circuits to each individual die and provides building blocks for power and performance binning and improvement. Reviews test plans with design, conversion of presilicon content to patterns, and additional content development as needed, and reviews HVM data with design to identify and rootcause the issues.

Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Bachelor/Lic Degree in Electronics, Electrical Engineering or related field or equivalent related experience in lieu of degree.
At least 2 Years of Experience in Semiconductors, post-silicon Validation or Related experience.
At least 2 Years of experience in an engineering position.
Advanced English Level.
Must have permanent unrestricted right to work in Costa Rica.

Preferred qualifications:
At least 2 years of experience in Test development and execution using lab equipment for analog, mixed-signal circuit characterization and debug.
At least 2 years of experience in Background and knowledge in hardware architecture analog, mixed signal design and implementation.
Experience with Product engineering or test content development.
Knowledge of IO protocols specs DFT architectures and design PCI Express USB3 DDR etc.
Evaluation and validation of analog, mixed signal and DFT circuits including concepts such as timing jitter margining squelch equalization.
Knowledgeable in statistical data analysis using platforms such as JMP.
Experience in DFTDFD hardware testing methods and tools.


Inside this Business Group


Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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Maggie Offensive Security Researcher

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