Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible.
Analog Devices Platform IP group are seeking an experienced analog IC layout design engineer to join our team. As part of this role, you will transfer and develop key strategic IP (Intellectual Property such as electronic circuits) that will be leveraged across multiple businesses/product opportunities throughout the company. A key focus area for this position includes interacting with internal customers to communicate, improve, and maintain developed IP. Primary IP design area targets power and clock management; however, design efforts will span a wide application range including precision references, IOs, and mixed-signal/analog circuitry.
Qualifications/Requirements:
· Minimum degree in Electrical/Electronic Engineering or equivalent.
· Ideally 5+ years’ experience in IC layout design.
· The ideal candidate should have a good practical knowledge of analog and mixed signal layout techniques and experience on Cadence Layout tools (Virtuoso) and Mentor Graphics verification systems (Calibre).
· The candidate should have experience designing in relative low process technology nodes & be able to apply techniques to reduce/remove WPE, STI & other layout parasitic effects.
· The candidate should be comfortable working independently as well as in multi-site teams.
· The candidate should be able to complete tasks with minimum supervision and be comfortable working directly with circuit design engineers.
· Experience in layout/physical design of various circuit types is required: i.e. ADCs, DACs, LDOs, PLLs, VCOs, amplifiers, power switches, etc.
· The position also requires knowledge of common circuit layout practices such as: matching techniques, ESD/Latch up mitigation techniques, circuit parasitic extraction & reduction, VXL compliance etc.
· The candidate should be self-driven, have strong interpersonal, communication & teamwork skills.
· Having knowledge and proficiency in Cadence SKILL is advantageous.
Responsibilities:
· Block floorplan, subsystem & chip level development.
· Physical verification (LVS, DRC, Density, Extraction, EM).
· Strong collaboration with Analog Designers to solve challenging problems.
· Develop schedule and monitor progress.
· Develop and continuously improve layout practices and procedures, knowledge share with community.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
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Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days