Job Overview
SambaNova Systems is looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics. As a Design Verification Engineer you'll have the opportunity to contribute to our cutting edge machine learning chips.
Responsibilities
- Develop and maintain test-bench components, test cases, and scripts for design verification at the block, full chip, system, and gate-level benches
- Develop test plan for functional, performance, and post-silicon verification
- Participate in mapping and coding ML and AL application flows for verification and compiler development
- Participate in design verification reviews, maintain regressions, and drive failure root-cause
- Collaborate with design, architecture, and software teams to innovate and solve problems
Qualifications
- BS in EE/CS (or related discipline). MS/PhD preferred.
- Understanding of one or more of the following domains
- Computer architecture, Machine Learning architecture
- Curriculum covers all or several of the following subjects
- Computer architecture, Machine learning algorithms, VLSI, Digital Design, SoC
- Strong in coding with System Verilog and scripting. SVA and C/C++ skills preferred.
- Strong debugging, analytical, and communication skills
- Strong collaborator as we believe in no boundaries and collaboration across the entire organization with access to all levels and departments
- Internship or research experience on ASIC development preferred
- Knowledge of standard verification methodologies such as VMM, OVM, or UVM preferred
Annual Salary Range and Level
The base salary for this position ranges from $120,000/year up to $160,000/year. This range is based on role, level, and location and reflects the salary target for new hires in the US. Individual pay within the range will depend on a number of factors, including a candidate’s job-related qualifications, skills, competencies and experience, and location.
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